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Programmable Packet Scheduling at Line Rate
Anirudh Sivaraman (MIT Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology), Suvinay Subramanian (MIT Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology), Mohammad Alizadeh (MIT Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology), Sharad Chole (Cisco Systems (United States)), Shang-Tse Chuang (Cisco Systems (United States)), Anurag Agrawal, Hari Balakrishnan (MIT Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology), Tom Edsall (Cisco Systems (United States)), S. Katti (Stanford University), Nick McKeown (Stanford University)
Abstract: Switches today provide a small menu of scheduling algorithms. While we can tweak scheduling parameters, we cannot modify algorithmic logic, or add a completely new algorithm, after the switch has been designed. This paper presents a design for a {\em programmable} packet scheduler, which allows scheduling algorithms---potentially algorithms that are unknown today---to be programmed into a switch without requiring hardware redesign.