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Spin-qubit control with a milli-kelvin CMOS chip

Samuel K Bartee (The University of Sydney, ARC Centre of Excellence for Engineered Quantum Systems), Will Gilbert (UNSW Sydney), Kun Zuo (The University of Sydney, ARC Centre of Excellence for Engineered Quantum Systems), Kushal Das (The University of Sydney, ARC Centre of Excellence for Engineered Quantum Systems), Tuomo Tanttu (UNSW Sydney), Chih Hwan Yang (UNSW Sydney), Nard Dumoulin Stuyck (UNSW Sydney), Sebastian Pauka (The University of Sydney, ARC Centre of Excellence for Engineered Quantum Systems), Rocky Y. Su (UNSW Sydney), Wee Han Lim (UNSW Sydney), Santiago Serrano (UNSW Sydney), Christopher C. Escott (UNSW Sydney), Fay E. Hudson (UNSW Sydney), Kohei M. Itoh (Keio University), Arne Laucht (UNSW Sydney), Andrew S. Dzurak (UNSW Sydney), D. J. Reilly (The University of Sydney, ARC Centre of Excellence for Engineered Quantum Systems)

Nature
DOI: 10.1038/s41586-025-09157-x (Physics and Astronomy)
License: CC BY

Abstract: Abstract A key virtue of spin qubits is their sub-micron footprint, enabling a single silicon chip to host the millions of qubits required to execute useful quantum algorithms with error correction1–3. However, with each physical qubit needing multiple control lines, a fundamental barrier to scale is the extreme density of connections that bridge quantum devices to their external control and readout hardware4–6. A promising solution is to co-locate the control system proximal to the qubit platform at milli-kelvin temperatures, wired up by miniaturized interconnects7–10. Even so, heat and crosstalk from closely integrated control have the potential to degrade qubit performance, particularly for two-qubit entangling gates based on exchange coupling that are sensitive to electrical noise11,12. Here we benchmark silicon metal-oxide-semiconductor (MOS)-style electron spin qubits controlled by heterogeneously integrated cryo-complementary metal-oxide-semiconductor (cryo-CMOS) circuits with a power density sufficiently low to enable scale-up. Demonstrating that cryo-CMOS can efficiently perform universal logic operations for spin qubits, we go on to show that milli-kelvin control has little impact on the performance of single- and two-qubit gates. Given the complexity of our sub-kelvin CMOS platform, with about 100,000 transistors, these results open the prospect of scalable control based on the tight packaging of spin qubits with a ‘chiplet-style’ control architecture.

Published on 25 Jun. 2025