# Combining multiplexed gate-based readout and isolated CMOS quantum dot arrays

**Authors:** Pierre Hamonic, Martin Nurizzo, Jayshankar Nath, Matthieu C. Dartiailh, Victor El-Homsy, Mathis Fragnol, Biel Martinez, Pierre-Louis Julliard, Bruna Cardoso Paz, Mathilde Ouvrier-Buffet, Jean-Baptiste Filippini, Benoit Bertrand, Heimanu Niebojewski, Christopher Bäuerle, Maud Vinet, Franck Balestro, Tristan Meunier, Matias Urdampilleta  
**arXiv:** [2410.02325](https://arxiv.org/abs/2410.02325)  
**Date:** 2024-10-03  
**Summary page:** https://www.summarizepaper.com/en/paper/2410.02325v1/

## Key points

- Researchers explore potential of semiconductor quantum dot arrays for spin-based error-corrected quantum computation
- Challenge of achieving single-spin occupancy in each dot within a growing array due to complexity and limited sensitivity of charge sensors
- Proposed novel approach to address the issue and scale up a spin-based architecture
- Demonstrated single-spin occupancy in foundry-fabricated array by combining two key methods:
- Loading finite number of electrons into the quantum dot array while isolating it from reservoirs for enhanced control over individual charges
- Deploying multiplex gate-based reflectometry to probe charge tunneling and spin states without traditional charge sensors or reservoirs
- Successful achievement of single-spin occupancy in each dot of isolated arrays
- Isolated arrays can be electrostatically tuned and offer scalable solution for spin-based quantum architectures
- Study opens up possibilities for building larger qubit arrays and designing advanced spin-based quantum systems with enhanced efficiency and performance

## Summary

In the study "Combining multiplexed gate-based readout and isolated CMOS quantum dot arrays," researchers Pierre Hamonic, Martin Nurizzo, Jayshankar Nath, and their team explore the potential of semiconductor quantum dot arrays for spin-based error-corrected quantum computation. The challenge lies in achieving single-spin occupancy in each dot within a growing array due to the complexity arising from numerous charge configurations and limited sensitivity of large-footprint charge sensors. To address this issue and scale up a spin-based architecture, the researchers propose a novel approach. They demonstrate single-spin occupancy in a foundry-fabricated array by combining two key methods. Firstly, they load a finite number of electrons into the quantum dot array while simplifying electrostatic tuning by isolating the array from reservoirs. This isolation enhances control over individual charges within each dot. Secondly, they deploy multiplex gate-based reflectometry to dispersively probe charge tunneling and spin states without relying on traditional charge sensors or reservoirs. Through their innovative techniques, the researchers successfully achieve single-spin occupancy in each dot of the isolated arrays. These arrays can be readily electrostatically tuned and offer a viable, scalable solution for spin-based quantum architectures. By combining multiplexed gate-based readout with isolated CMOS quantum dot arrays, this study opens up possibilities for building larger qubit arrays and designing advanced spin-based quantum systems with enhanced efficiency and performance.