# Attestation Waves: Platform Trust via Remote Power Analysis

**Authors:** Ignacio M. Delgado-Lozano, Macarena C. Martínez-Rodríguez, Alexandros Bakas, Billy Bob Brumley, Antonis Michalas  
**arXiv:** [2105.02435](https://arxiv.org/abs/2105.02435)  
**Date:** 2021-05-06  
**Summary page:** https://www.summarizepaper.com/en/paper/2105.02435v2/

## Key points

- The paper explores using side-channel information captured by an ADC in the same SoC as the PS to perform attestation.
- Voltage fluctuations at the input terminal can be used to characterize and distinguish certain operations from other binaries.
- This approach eliminates the need for physical proximity required by other methods that use external setups to capture electromagnetic emanation.
- The attestation protocol involves three phases: Setup Phase, Trusted Launch Phase, and Computations Phase.
- During the Setup Phase, each entity receives a public/private key pair.
- In the Trusted Launch Phase, Verifier V launches a TEE on an untrusted platform with the help of a setup function Fs publicly known.
- In the Computations Phase, P executes applications chosen by V while measuring power consumption through ADCs and sending traces to V for verification against templates stored in Measurements Tray (MT), an independent cloud component responsible for storing templates and comparing them with traces received by V.
- The research was funded by various organizations such as ERC, ASCLEPIOS project under EU research project No. 826093, Cybersecurity Research Award granted by TII, i-LINK+ 2019 “Advancing in cybersecurity technologies” Ref.LINKA20216 supported by CSIC's Andalusia ESF Operational Programme 2014-2020 and HPY Research Foundation.
- Limitations of this proof-of-concept work include improving true positive rates and addressing substitution attacks.

## Summary

This paper explores the possibility of using side-channel information captured by an analog-to-digital converter (ADC) within the same System-on-Chip (SoC) as the processor system (PS) to perform attestation. The authors propose capturing voltage fluctuations at its input terminal while a certain operation is taking place, which can be used to characterize and distinguish it from other binaries. This approach eliminates the requirement for physical proximity, which is necessary for other methods that use external setups to capture electromagnetic emanation. The attestation protocol involves three phases: Setup Phase, Trusted Launch Phase, and Computations Phase. During the Setup Phase, each entity receives a public/private key pair. In the Trusted Launch Phase, Verifier V launches a Trusted Execution Environment (TEE) on an untrusted platform with the help of a setup function Fs publicly known. Finally, in the Computations Phase, P executes applications chosen by V while measuring power consumption through ADCs and sending traces to V for verification against templates stored in Measurements Tray (MT), an independent cloud component responsible for storing templates and comparing them with traces received by V. 

This research was funded by various organizations such as European Research Council (ERC), ASCLEPIOS project under EU research project No. 826093, Cybersecurity Research Award granted by Technology Innovation Institute (TII), i-LINK+ 2019 “Advancing in cybersecurity technologies” Ref.LINKA20216 supported by CSIC's Andalusia ESF Operational Programme 2014-2020 and HPY Research Foundation. However, this proof-of-concept work has limitations that need to be addressed in future studies such as improving true positive rates and addressing substitution attacks.